Current pulses are often employed in testing electrical components and circuits. When high repetition rate current pulses are required, for example with pulsed electromigration tests, the desired pulse waveform is usually rectangular. Therefore, the transitions between current levels must be abrupt with minimal overshoot to effectively provide the intended current drive at each level. See FIG. 1 for bipolar and unipolar current pulses, respectively. Ideally, the transition from ground level (“0”) to the required current (“Ap” or “An”, or generally “A” for simplicity) is abrupt, as show in FIG. 1. In reality, however, such transitions take time and can be too slow to reach the required maximum level A.
An effective technique to achieve current pulses is implemented by connecting a constant (DC) current source to ground and thereby shunting the current from a device under test (DUT) as shown in FIG. 2. Here, current flow through the device under test (DUT) is shunted to ground by shunt transistor, Qs, in response to a control signal at point P which is connected through resistor Rx to shunt transistor Qs. The desired waveform is achieved in response to the timing generator having a required period T, “on” time t and “off” time (T-t). See for example Krieger et al. U.S. Pat. No. 6,249,137 for CIRCUIT AND METHOD FOR PULSED RELIABILITY TESTING.
In general, it is relatively easy to generate an ideal driving pulse at the gate of the main shunting transistor Qs (point “P” in FIG. 2). Similarly, modern power transistors can provide both very low on resistance and very fast intrinsic transition between their on and off states in both directions. A problem is the parasitic capacitance Co between the output node “C” and Ground (Gnd), which includes the output capacitance of Qs, any stray capacitance associated with the DUT, the output capacitance of the DC current source and any other capacitance introduced by the test setup, such as cables or test fixtures. Reducing this capacitance to a desirable level is difficult, since it is strongly related to Idc and to the current sinking capability of Qs. With pulsed current applications often requiring wide range of current levels, it is impractical to sacrifice high-current characteristics in favor of low-current performance and vice versa. In fact, the problem is limited to low and perhaps medium currents; however, to assure proper high current operation both Qs and the DC current source must be sufficiently strong, implying large values of Co accordingly.
This limitation is not an issue when voltage pulses, rather than current, are involved. Most voltage sources are capable of driving relatively large currents while trying to reach the intended level (A or Ground, depending on the specific transition); therefore inherently generating fast transitions. In the pulsed current source case, Idc is simply diverted to Qs while it is on, as Co discharges through Qs simultaneously. While Qs is off, Co is charged exponentially to the steady state level Vo=(Rdut)(Idc), with a time constant τ=(Co)(Rdut). As low current applications often require Rdut of several kilo-ohms (kΩ) and Co is rarely less than 20 pF, the resulting time constant is several tens of nanoseconds. On the other hand, since Ron is very small, Co discharges very quickly after Qs enters its on state; thus posing no practical delay.
The present invention is directed to facilitating fast current transition from 0 to A through DUT with transition time, tr, substantially shorter than the related pulse duration, tp, tn, and with an acceptable minimal overshoot.